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Synchronous NAND Flash Controller ONFI compatible-ip-21112
￥10,000.00
| 供应商 | Eureka |
|---|---|
| 型号 | NAND Flash Controller for synchronous ONFI 3.0 and 2.3 DDR and asynchronous NAND Flash, ECC, DMA and Boot ROM support |
| 类型 | Soft IP |
| 到期日 | Silicon proven |
| 源网址 | View more |
| 特征 | Compatible with ONFI 2.3 DDR Flash Interface Supports synchronous and asynchronous single level and multi-level (SLC and MLC) NAND Flash Supports source synchronous double data rate (DDR) data transfer for highest bandwidth Choices of AHB, AXI, PLB, Wishbone, SH4 and Avalon interface Built-in DMA engine and internal buffer for fast data transfer ECC for 4 to 40 bits or more error protection Store ECC code in spare column area Write-trigger read operation eliminates long wait state when open a new page Enable NAND Flash to be used as BOOT ROM Compatible with standard FTL software for wear leveling and bad block management |
| 详情页 | View more |
| 附件链接 | View more |
The Synchronous NAND Flash controller provides an simple interface for user to access both synchronous and asynchronous NAND Flash devices. While NAND Flash devices have complicated access protocols, this controller manages all the hardware protocols and allows the user to access NAND Flash memory as easily as reading and writing on chip registers. The controller supports asynchronous and source synchronous double data rate (DDR) data transfer and is compatible with ONFI 3.0 and 2.3. It provides much higher data throughput than traditional asynchronous NAND interface.
Hardware generated ECC provides the required multi-bit ECC protection for NAND Flash devices. Bose, Chaudhuri, and Hocquenghem (BCH) code is available for 4 to 40 bits ECC protection. Option for hardware ECC correction and software ECC correction are available.
The NAND Flash offers many features to improve system performance and increase system design flexibility. The Boot ROM support feature allows the NAND Flash to be used as Boot ROM and DMA can directly transfer data from NAND Flash to memory without using system CPU. Standard bus interface such AHB, AXI, PLB, Wishbone, and Avalon are available.
Hardware generated ECC provides the required multi-bit ECC protection for NAND Flash devices. Bose, Chaudhuri, and Hocquenghem (BCH) code is available for 4 to 40 bits ECC protection. Option for hardware ECC correction and software ECC correction are available.
The NAND Flash offers many features to improve system performance and increase system design flexibility. The Boot ROM support feature allows the NAND Flash to be used as Boot ROM and DMA can directly transfer data from NAND Flash to memory without using system CPU. Standard bus interface such AHB, AXI, PLB, Wishbone, and Avalon are available.
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