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供应商	True Circuits
型号	PLL TSMC CL013LVOD 130nm Low Banwidth PLL - 440MHz-2200MHz
类型	Hard IP
到期日	Silicon proven
源网址	View more
特征	- Designed to address the problem of excessive system clock jitter originating from lower-quality crystals. - an adjustable bandwidth allows the designer to dial-in the desired amount of period jitter filtering. the bandwidth is adjustable as a precise fraction of the reference frequency. - Feedback divider with 8 fractional bits allows the frequency to be set more precisely when the bandwidth is reduced.
详情页	View more
附件名称	www.truecircuits.com\product-TCI-T13LVOD-LBHPLL.html
附件链接	View more

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详情

The Low Bandwidth PLL is designed to multiply an input clock by a fixed-point number between 1 and 16 with a low adjustable loop bandwidth. It does not provide any deskew functionality. The low loop bandwidth provides filtering of reference input jitter. It contains a 1-16 divider at the reference clock input, a 1-16 integer divider and a 1-256 fractional divider in the internal feedback path, and a 1-8 divider at the output. The loop bandwidth is inversely controllable with a relative range of 1-256. The outputs are 50% duty cycle for all output divider values.

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