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| 供应商 | Cadence |
|---|---|
| 型号 | Application-optimized, high-performance controller IP for PCIe |
| 类型 | Soft IP |
| 到期日 | Silicon proven |
| 源网址 | View more |
| 特征 | Compliant with PCIe 4.0, 3.1, 2.1, and 1.1 specifications 32/16b interface for 500MHz or 1GHz core operation Modes supported: Root Complex, EndPoint, or Dual Mode SR-IOV and multifurcation options Support for up to 4K payload size and 256 functions ECNs, Error Counters, ECRC, and end-to-end datapath parity support Superscalar design for high throughput and low latency Configured to your specific needs – efficient implementation with minimal gate count Optimized for use with Cadence PHY |
| 详情页 | View more |
| 附件链接 | View more |
The Cadence? Controller IP for PCIe 4.0 provides the logic required to integrate a root complex (RC), endpoint (EP), or dual mode (DM) controller into any system-on-chip (SoC). Compliant with PCIe 4.0, 3.1, 2.1, and 1.1 specifications, the Controller IP has over 100 configuration features to customize the controller to the specific needs of any computing, networking, or storage application. The Controller IP is engineered to quickly and easily integrate into any SoC and connect seamlessly to a Cadence or third-party PIPE 4.0-compliant PHY. Client applications access the controller through an industry-standard Arm? AMBA? interface or through a native Cadence interface, Host Adaptation Layer (HAL). The Controller IP has been extensively tested using Cadence Verification IP for PCIe as well as the Cadence Palladium? series verification computing platform. Cadence offers a comprehensive IP solution that is in volume production and successfully implemented in dozens of applications.
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