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供应商	Alphawave Semi
型号	OpenFive USB3.0 DR-OTG Controller IP Core
类型	Soft IP
到期日	Silicon proven
源网址	View more
特征	Compliant to USB 3.0 Rev1.1 and OTG & EH supplement Rev1.0 Backward compatible USB2.0 with (optional) 3rd party USB2.0 OTG controller Support to 8/16/32 bit standard PIPE interface Compliant to 32-bit AXI system bus interface Supports Default Control Endpoint 0 and Endpoints up to 15 IN & 15 OUT Configurable burst sizes for each Function Endpoint Supports Bulk Streaming and smart isochronous feature Support for all spec defined Low Power States Fully Integrated DMA controller (optional) Option to disable scrambling, Monitor Link States, Endpoints and FIFOs
详情页	View more
附件链接	View more

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详情

OpenFive's USB3.0 DR-OTG Controller IP is compliant to USB3.0 OTG specification and certified as Device Controller and Embedded Host Controller. It supports both Gen2 and Gen1 and AXI4 for system integration. It is validated using FPGA prototype with industry standard PHYs.

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