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供应商 | Alphawave Semi |
---|---|
型号 | LPDDR5/4x Subsystem IP |
类型 | Hard IP |
到期日 | Available on request |
源网址 | View more |
特征 | Compliant with JEDEC Standard JESD209-4B and JESD209-5 Complaint with DFI 5.0 for PHY and Controller interface Supports data rate up to 4266Mbps for LPDDR4/4X and 6400Mbps for LPDDR5 Supports Data Bus Inversion (DBI) mode Supports PHY independent training modes Supports periodic re-training for DRAM write and read operation Supports IO calibration and Programmable ODT calibration Supports Light Sleep and Deep Sleep mode (DSM) Supports Retention mode/Self Refresh mode (Core and IO power down) Supports DRAM widths of x8 and x16 bits |
详情页 | View more |
附件链接 | View more |
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