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| 供应商 | Ocean Logic |
|---|---|
| 型号 | Multi-Channel 1080p@30 H.264 Limited Decoder |
| 类型 | Soft IP |
| 到期日 | Silicon proven |
| 源网址 | View more |
| 特征 | Supports HD up to 1080p30 Very low operational frequency : 4 clocks per pixel (1080p@30 - 250 MHz) Single core 720p@ 30 support in FPGA , 1080p30 in ASIC Supports up to 32 video channel simultaneously No CPU required for decoding Very low latency (~1.1 ms for VGA @ 30 fps) for single channel |
| 详情页 | View more |
| 附件名称 | OL_H264MCLD.pdf |
| 附件链接 | View more |
Description
The OL_H264MCLD core is a hardware implementation of the H.264 video compression algorithm.
The core decodes a bitstream produced by the H264MCE encoder and produces a video stream up to the highest HDTV resolution.
The core processing capability can be shared amongst up to 32 channels.
Simple, fully synchronous design with low gate count.
The OL_H264MCLD core is a hardware implementation of the H.264 video compression algorithm.
The core decodes a bitstream produced by the H264MCE encoder and produces a video stream up to the highest HDTV resolution.
The core processing capability can be shared amongst up to 32 channels.
Simple, fully synchronous design with low gate count.
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