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| 供应商 | nSilition |
|---|---|
| 型号 | The cell is a high-speed and low-power LVDS bidirectional transceiver IO cell powered at 2.5V/1.0V or 1.8V/1.0V on TSMC65G |
| 类型 | Hard IP |
| 到期日 | Silicon proven |
| 源网址 | View more |
| 特征 | Standard-compliant to TIA/EIA-644-A-2001 Built-in, low parasitic ESD protection, up to 2 Gbps data rate Easily integrates with TSMC I/O library cells All-in-ring? topology, so no core silicon area is used by LVDS The same cells operate with 2.5V/1.0V or 1.8V/1.0V power supplies Adjustable output common mode voltage (LVDS or SubLVDS mode) Adjustable driving current for buses with single or double termination Standby/power down mode, digital loopback functions to ease ATE testing Internal bias voltage generation and bias current distribution circuitry Selectable on-chip termination resistor, with optional user tuning |
| 详情页 | View more |
| 附件名称 | nSIO_TS65GP_2V5_1V0_BIDIR_PB.pdf |
| 附件链接 | View more |
The LSB25R/Z cell is a high-speed and low-power LVDS
bidirectional transceiver IO cell powered at 2.5V/1.0V or
1.8V/1.0V, designed on the TSMC 65 GP technology.
bidirectional transceiver IO cell powered at 2.5V/1.0V or
1.8V/1.0V, designed on the TSMC 65 GP technology.
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