NAND Flash Controller for SLC and MLC-ip-21110

¥10,000.00
有货
SKU
ip-21110
Brand :
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供应商 Eureka
型号 NAND Flash Controller for asychronous SLC and MLC NAND Flash devices. Built-in ECC and Boot ROM support
类型 Soft IP
到期日 In Production
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特征 Supports single-level and multi-level cells (SLC and MLC) NAND Flash devices Supports 1 to 20 bit ECC correction per 512byte Programmable support for large block and small block and large block NAND Flash Simple user interface designed for easy on-chip integration Choices of AHB, AXI, PLB, Wishbone and Avalon user interface Supports ONFI standard command interface User has full access to spare data in NAND Flash device Enable NAND flash be used as Boot ROM by automatic page open and DMA Supports two-plane page program and erase for doubling system bandwidth Compatible with standard FTL and Linux JFFS2 for wear leveling and bad block management
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The NAND Flash controller provides an easy interface for user to access single-level and multi-level cell (SLC and MLC) NAND Flash devices. While NAND Flash devices have a complicated set of access protocols, this controller manages all the hardware protocols and allows the user to access NAND Flash memory simply by reading and writing the controller register set.

A very large size of NAND Flash memory can be accessed through a small number of control registers. The NAND Flash controller occupies only a small size in the system's memory space without scarifying system performance. Burst access to the NAND Flash memory is supported by the controller at full memory bandwidth.

Hardware generated ECC provides the required ECC protection for NAND Flash devices. For SLC NAND Flash, Hamming Code is used for single bit correction and double bit detection. For MLC devices, Bose, Chaudhuri, and Hocquenghem (BCH) code is used for multi-bit ECC error protection from 4 to 20 bits. Standard bus interface such as AHB, AXI, Wishbone, Boot ROM support, and DMA adds flexibility in integrating this IP core to any system design.

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