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供应商	T2M
型号	MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 55 ULP
类型	Soft IP
到期日	Silicon proven
源网址	View more
特征	Compatible with PCIe base Specification Full compatible with PIPE3.0 interface specification Implemented Receiver equalization Adaptive-CTLE to compensate insertion loss Support 16-bit/32bit parallel interface Support for PCIe gen1(2.5Gbps) and PCIe gen2(5.0Gbps) Support flexible reference clock frequency Support 100MHz differential reference clock input or output (with SSC optionally) in PCIe Mode Support Spread-Spectrum clock (SSC) generation and receiving from -5000ppm to 0ppm Support programmable transmit amplitude and Deemphasis Support TX detect RX function in PCIe Mode
详情页	View more
附件链接	View more

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详情

The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, UniPro v1.8 Specification, and Universal Flash Storage (UFS) v3.0 Specification are all compatible with the MIPI M-PHY Gear 4 IP. a high-bandwidth serial interface technology developed especially for mobile applications in order to reduce the number of pins and improve energy efficiency. Up to 11.6Gbps of HS Gear4 data speeds are supported. Both the UniPro controller and UFS Controller are supported by the RMMI interface-compatible MIPI M-PHY Gear 4 IP. The MIPI M-PHY offers dependable embedded system debugging and receiver ocular data monitoring at a reasonable cost through Build-In-Self-Test (BIST).

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