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供应商	M31 Technology Corporation
型号	MIPI DPHY Transmitter v1.1 Tx (1C4D), v1.2 Tx (1C4D)
类型	Hard IP
到期日	Silicon proven
源网址	View more
特征	Compliant with MIPI D-PHY spec up to v1.2 (by different process nodes) Support MIPI DSI and CSI-2 protocol Support HS data rate from 80Mbps up to 2.5Gbps (per lane) Support LS data rate of 10Mbps and Ultra-low power mode Support 1 clock lane & up to 4 data lanes Support extra RX mode with 2 sets of 1 clock lane & up to 2 data lanes Provide swap function for clock and data lane to ease PCB design Provide sub-LVDS compatibility (by different process nodes) Provide a stand-alone parallel BIST module for mass production test
详情页	View more
附件链接	View more

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详情

The D-PHY is a popular MIPI physical layer developed for mobile applications because it is a flexible, high-speed, low-power and low-cost solution. As a MIPI Alliance contributor and leading Interface IP provider, M31 provides silicon-proven D-PHY in different process nodes. The D-PHY IP follows MIPI D-PHY v1.1/v1.2 spec and supports full range of high-speed (HS) and low-power (LP) data transfer. It is compliant to the PPI interface which allows seamless integration with upside controllers for Camera Serial Interface (CSI-2) and Display Serial Interface (DSI) protocols. Car manufacturers are also adopting MIPI specifications because the solutions are mature, relatively simple to use. M31 provides certified and compact PHY to support automotive applications.

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