MIPI D-PHY in ON Semiconductor 180nm-ip-17556

¥10,000.00
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SKU
ip-17556
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供应商 Arasan Chip Systems
型号 MIPI Compliant Analog D-PHY in ON Semiconductor 180nm
类型 Hard IP
到期日 Silicon proven
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特征 Compliant to MIPI Alliance Standard for D-PHY specification Version 1.1 Supports asynchronous transfer at low power mode with a bit rate of 10 Mb/s Supports ultra low power mode, high speed mode and escape mode Supports one clock lane and up to four data lanes PHY can be configured as a master or slave Has clock divider unit to generate clock for parallel data reception and transmission from/to the PPI unit On-chip clock generation configurable for either transmitter or a receiver Available in various foundry processes. No external (off-chip) components required Can be ported to other processes
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