MIPI CSI-2 Tx IP core HIP 3900-ip-22513

¥10,000.00
有货
SKU
ip-22513
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供应商 HDL Design House
型号 MIPI CSI-2 Transmitter IP core - HIP 3900
类型 Soft IP
到期日 Silicon proven
源网址 View more
特征 Compliant to the following specifications: CSI-2 (Camera Serial Interface) version 1.01, D-PHY version 1.0, AMBA3 AHB-Lite Protocol Specification version 1.0 Highly configurable - 35 registers ~40 different maskable interrupts Supports up to 4 data lanes (minimum is one data lane) and one clock lane Supports up to 4 virtual channels All types of Data Interleaving are supported Supports up to 4 cameras Support High Speed, Low Power and Ultra Low Power modes Various pixel formats defined in CSI protocol version 1.01 (YUV420 8-bit, YUV420 8-bit (legacy), YUV420 10-bit, YUV422 10-bit, YUV420 8-bit (CSPS), YUV420 10-bit (CSPS), YUV422 8-bit, YUV422 10-bit, RGB888, RGB666, RGB565, RGB555, RGB444,RAW6, RAW7,RAW8 Generic short Packet Data Types
详情页 View more
附件名称 HIP3900_csi2txPB.pdf
附件链接 View more
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CSI-2 (Camera Serial Interface) Transmitter IP core is highly configurable, synthesizable digital IP core which receives pixels from camera sensor, performs packing in form of long packets, and Short packets, and sends them via PPI interface to the Host processor. Designed for use in portable electronic devices such as media players, mobile phones, and personal assistant devices, the CSI-2 Transmitter IP core is fully compliant to MIPI Alliance's CSI standard, as well as to AMBA's AHB specification. This IP core has been designed and verified using Cadence state-of-the-art EDA tools, methodology and recommended design and verification flow.

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