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IP core for Xilinx FPGA
Supports fast graphics operations with bitmaps
2.5D option enables perspective correct texture rendering in 3D
Solid fill - Rectangle or Triangle rendering with any color
High speed texture rendering
Texture swizzling storage operation
Supports 32bpp (TrueColor with Alpha channel)
Configurable register interface: CoreConnect OPB or PLB
Configurable video memory interface: Xylon XMB or Xilinx MPMC
Fully embedded into Xilinx XPS and the EDK
The logiBMP is 2.5D graphics accelerator from Xylon logicBRICKS IP library, optimized for Xilinx FPGAs and designed to speed up graphics operations with bitmaps. This IP core significantly speeds up GUI rendering. The logiBMP supports very complex bitmap operations like texture renderings, picture filtering, up and down scaling, and bitmap rotating. The core is fully embedded into Xilinx Platfrom Studio and EDK tools, and its integration with on-chip CoreConnect PLB and OPB busses is very simple. Parametrizable VHDL design allows tuning of slice consumption and features set through an easy-to-use GUI interface. The logiBMP enables perspective correct texture renderings of 2.5D graphics scenes. The IP core can be easily integrated with other logicBRICKS, i.e. logiCVC Compact Multilayered Video Controller and the logiBITBLT 2D graphics accelerator to support smooth graphics transition and animations.
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