PLL

Phase Locked Loops (PLLs) are used to lock and input and reference clock to a prescribed [fixed] phase relationship. They are typically used to remove propagation delay (phase shift) between an input reference clock and internal (on-chip) clock, but have a variety of other uses as well.

PLL UMC L65LP 65nm Spread Spectrum PLL - 60MHz-300MHz-ip-22824
￥10,000.00
PLL UMC L65LP 65nm General Purpose PLL - 120MHz-600MHz-ip-22823
￥10,000.00
PLL UMC L55LP 55nm Low Banwidth PLL - 60MHz-300MHz-ip-22822
￥10,000.00
PLL UMC L130HS 130nm Deskew PLL - 320MHz-1600MHz-ip-22821
￥10,000.00
PLL TSMC CL013LVOD 130nm Low Banwidth PLL - 440MHz-2200MHz-ip-22820
￥10,000.00
PLL GF L55G 55nm Deskew PLL - 90MHz-450MHz-ip-22819
￥10,000.00
PLL GF L28HPP 28nm Spread Spectrum PLL - 600MHz-3000MHz-ip-22818
￥10,000.00
PLL GF/CP L90G 90nm Clock Generator PLL - 120MHz-600MHz-ip-22817
￥10,000.00
PLL GF/CP L55G 55nm Low Banwidth PLL - 180MHz-900MHz-ip-22816
￥10,000.00
PLL GF L55LPE 55nm Deskew PLL - 240MHz-1200MHz-ip-22812
￥10,000.00
PLL GF L55LPE 55nm Deskew PLL - 120MHz-600MHz-ip-22806
￥10,000.00
PLL GF L55LP 55nm General Purpose PLL - 160MHz-800MHz-ip-22016
￥10,000.00