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The Trilinear Technologies High-bandwidth Digital Content Protection (HDCP) Encryption-Decryption Engine IP core allows system designers to accelerate time to market and reduce design risks with an HDCP standards-compliant encryption and decryption engine. HDCP is a technology developed by Intel Corporation designed to strongly protect in real-time high-value streamed content, such as HD and UHD feature films, being sent over a data link.
Our HDCP Encryption-Decryption Engine IP core is compliant with the HDCP 1.3/2.3 specifications. When deployed with the Trilinear HDCP Authentication Software Stack running on a local processor, this IP core provides a complete, real-time solution for HDCP 1.x or HDCP 2.x protection of a digital link.
Verification testing was completed using a bottom-to-top methodology. Testing is first performed at the module level and progresses up to system level. With the HDCP EncryptionDecryption Engine IP core, module-level testing consists of generating both randomized and corner case (boundary value) conditions.
Trilinear Technologies delivers an extensive design database for the HDCP EncryptionDecryption Engine core. In addition to the synthesizable RTL IP core and extensive user level verification environment, the database includes all the files required to implement the design on multiple platforms, including FPGA and ASIC technologies. Reference software drivers and applications are included, along with associated documentation to reduce the amount of time for software development.
Files and data include:
Design Database
HDL source files for function design
Fully functional models for block-level and
top-level testing, including over 120+ tests
in the user-level environment
Functional specification
Timing constraints summary document
Generic SRAM simulation models
C Reference Driver
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