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eMMC 5.1 /SD-SDIO3.0 Host Controller & PHY-ip-20632
￥10,000.00
| 供应商 | Dolphin Technology |
|---|---|
| 型号 | eMMC 5.1 /SD-SDIO3.0 Host Controller & PHY |
| 类型 | Soft IP |
| 到期日 | Pre-silicon |
| 源网址 | View more |
| 特征 | DFI 4.0 Compliant Interface with 1:1 (Matching), 1:2 and 1:4 Frequency Ratios Optimized to provide a complete solution along with the Dolphin Technology DDR PHY solution Built-in Gate Training, Read/Write Leveling, and VREF Training Multi-Port Configurable AXI4 Interface with QoS Signaling, Single AXI4-Lite Programming Interface FPGA portable. Compatible with Xilinx PHY and Altera PHY. Intelligent Bank Management, Auto-Precharge Scheduling, Traffic Direction Aggregation and Switching Programmable and Dynamic Auto-refresh Scheduling AXI4 Dynamic QoS Signaling for Non-Blocking Communications Multi-Channel and Multi-Rank Configuration Real-Time QoS Capability, Support for Out-of-Order Memory Access |
| 详情页 | View more |
| 附件名称 | Dolphin Technology Product Overview.pdf |
| 附件链接 | View more |
Dolphin Technology offers high performance DDR4/3/2 SDRAM and LPDDR4/3/2 SDRAM Memory Controller IP across a broad range of process technologies. These Memory Controllers are fully compliant with the DFI 4.0 specification, support speeds up to 4266 Mpbs, and are optimized to provide a comprehensive solution when combined with Dolphin's DDR PHY IP. - Supports JEDEC Standard DDR4/3/2 and LPDDR4/3/2 SDRAM - Fully configurable for various performances and requirements, ensuring maximum performance for different system environments. - Supports speeds of up to 4266 Mbps (2133 MHz) LPDDR4 -
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