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| 供应商 | Synopsys |
|---|---|
| 型号 | Secure DDR5 Controller with Inline Memory Encryption (IME) Security |
| 类型 | Soft IP |
| 到期日 | Available on request |
| 源网址 | View more |
| 特征 | Supports JEDEC standard DDR5 and DDR4 SDRAMs and DIMMs Multiport Arm® AMBA® interface (AXI™4/AXI™3) with managed QoS or single-port host interface to the DDR controller DFI 5.0 compliant interface to Synopsys DDR5/4 PHY or other DDR5/4 PHYs Best in class performance with unique features such as QoS-based scheduling and phase-aware scheduling High-bandwidth design with up to 64 CAM entries for reads and 64 CAM entries for writes; latency as low as 8 clock cycles UVM testbench with embedded assertions and options to incorporate a DDR5/4 PHY into a verification environment Integrated with Synopsys Inline Memory Encryption (IME) to provide data confidentiality |
| 详情页 | View more |
| 附件链接 | View more |
Synopsys DDR5/4 Controller is a next-generation memory controller optimized for latency, bandwidth, and area., supporting JEDEC standard DDR5 and DDR4 SDRAMs and DIMMs The highly configurable controller meets or exceeds the design requirements of a wide range of applications from data center to consumer.
The Synopsys DDR5/4 Controller connects to the Synopsys DDR5/4 PHY or other PHYs via the DFI 5.0 interface to create a complete memory interface solution. The controller includes software configuration registers, which are accessed through an AMBA 3.0 APB interface.
The DDR controller block includes advanced command scheduler, memory protocol handler, optional ECC (Error-correcting code), and dual-channel support, as well as the DFI interface to the PHY. The Synopsys DDR5/4 Controller seamlessly integrates with the Synopsys Inline Memory Encryption (IME) Security Module to provide confidentiality of data in-use or stored in off-chip memory
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