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| 供应商 | Synopsys |
|---|---|
| 型号 | DesignWare IP Solutions for the AMBA Interconnect |
| 类型 | Soft IP |
| 到期日 | Available on request |
| 源网址 | View more |
| 特征 | High-performance, low-latency interconnect fabric for AMBA 3 AXI and AMBA 4 AXI with ACELite support Configurable standalone pipelining stage for AMBA 3 AXI and AMBA 4 AXI subsystems Configurable multi-layer interconnection matrix Bridge from AMBA 3 AXI/AMBA 4 AXI to AMBA 2.0 AHB enables easy integration of legacy AHB designs with newer AXI systems Configurable high-performance interface from an AHB master to an AXI slave Simplifies the connection of third party/custom master or slave controllers to any AMBA 3 AXI/AMBA 4 AXI fabric Configurable vectored interrupt controllers for AHB or APB bus systems Verification IP for AMBA 2 AHB/ APB and AMBA 3 AXI/AMBA 4 AXI |
| 详情页 | View more |
| 附件名称 | dw_amba_solutions.pdf |
| 附件链接 | View more |
The DesignWare? IP solutions for the ARM? AMBA? interconnect include synthesizable IP, verification IP (VIP) and automated assembly with Synopsys’ coreAssembler tool. The DesignWare IP for the AMBA interconnect allows designers to rapidly integrate infrastructure components into their systems-on-chip (SoC) and verify results with less risk and a reduced design cycle. Complementing the synthesizable IP is the VIP for AMBA interconnect, which includes the master, slave and monitor, providing designers with a quick and efficient way to verify AMBA interconnect-based SoCs. The Synopsys coreAssembler tool provides an automated method for assembling and configuring IP in a subsystem and develops an initial verification testbench for both the AMBA 2.0 and AMBA 3 AXI, AMBA 4 AXI and ACE-Lite protocol-based designs. This automation reduces the complexity of designing AMBA-based subsystems and improves overall productivity for faster time-to-results.
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