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供应商	T2M
型号	DDR3 SDRAM Controller IP with advance feautures package
类型	Soft IP
到期日	Silicon proven
源网址	View more
特征	Supports DDR3 protocol standard JESD79-3F Specification. Compliant with DFI-version 2.0 or higher Specification. Supports all the DDR3 commands as per the specs. Supports up to 16 AXI ports with data width upto 512 bits. Supports controllable outstanding transactions for AXI write and read channels Supports in port arbitration and multi-port arbitration. Supports user programmable page policy. Supports Error Checking and correction (ECC). Supports retry on ECC error, with retry limit user controllable. Supports high clock speeds in ASIC and FPGA. Supports low latency for write and read path. Supports reordering of transactions for higher performance. Supports 512MB, 1GB, 2GB, 4GB, 8GB densities. Supports 8 internal banks.
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详情

DDR3 interface provides full support for the DDR3 interface, compatible with JESD79-3F specification and DFI-version 2.0 or higher Specification Compliant. Through its DDR3 compatibility, it provides a simple interface to a wide range of low-cost devices. DDR3 IP is proven in FPGA environment. The host interface of the DDR3 can be simple interface or can be AMBA AHB, AMBA AHB-Lite, AMBA APB, AMBA AXI, AMBA AXI-Lite, Tilelink, OCP, VCI, Avalon, PLB, Wishbone or Custom protocol.

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