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| 供应商 | Digital Blocks |
|---|---|
| 型号 | 2D Graphics Engine - Hardware BitBlt with 256 Boolean Raster Operations |
| 类型 | Soft IP |
| 到期日 | In Production |
| 源网址 | View more |
| 特征 | Bit Block Transfer – 3 Independent Memory Sources of data: On-Screen & Off-Screen Data Block (SRC); Off-Screen Fixed Pattern Data Block (PTN) ; On-Screen visible Data Block (DST) 2D Raster Operations (ROP) performed on Block Transfers: 256 Raster Operations ; ROP0, ROP1, ROP2, & ROP3 operations; Includes industries most popular 16 ROPs BitBLT Draw Features: Pixels, Horizontal & Vertical Lines; Overlapping & Non-Overlapping Block Transfers; Solid Color Block Fills; FONT Monochrome Bitmap to Color Expansion, either Transparent or Opaque; Rotation Block Transfers: 0, 90, 180, 270 degrees; BitBLT Draw Features (additional): Block Stretch on X & Y Axis; Alpha Blending; Sprite Moves 2D Graphics Rendering Engine (Option): Pixel Drawing; Line (Vector) Drawing – any direction ; Polygon Rendering; Filled Polygon Command FIFO or Link-List Display Processing Unit Frame Buffer & Display Features Supported: Display Resolutions 4K x 4K; 8, 16 , 24, & 32 bits-per-pixel color depths Interrupt Controller with 3 sources of internal interrupts with masking control Reference Software Driver Included Compatible with Digital Blocks DB9000 Family of TFT LCD Controller IP Cores and Reference Designs |
| 详情页 | View more |
| 附件名称 | DB9100AXI-DS.pdf |
| 附件链接 | View more |
The Digital Blocks DB9100AXI Bit Block Transfer (BitBLT) Graphics Engine IP Core provides hardware acceleration of block moves with Raster Operation (256 data manipulation operations) of off-screen or on-screen data within frame buffer memory in a graphic display system. In addition, the DB9100AXI provides hardware accelerated 2D graphics rendering capability. Utilizing the accelerated BitBLT & 2 D graphics operations, the DB9100AXI IP Core greatly increases software productivity.
The DB9100AXI works in parallel with the DB9000AXI TFT LCD Controller IP Core, interfacing a microprocessor and frame buffer memory via the AMBA AXI Bus to a TFT LCD panel. Frame buffer memory typically is either on-chip SRAM memory or larger off-chip SRAM or SDRAM.
The DB9100AXI works in parallel with the DB9000AXI TFT LCD Controller IP Core, interfacing a microprocessor and frame buffer memory via the AMBA AXI Bus to a TFT LCD panel. Frame buffer memory typically is either on-chip SRAM memory or larger off-chip SRAM or SDRAM.
FAQ - Frequently Asked Questions
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Q4: How long will it take for my order to arrive after I make payment?
A4: Members who ship their orders within Inida should expect to receive their orders within 2 working days upon payment verification depending on the count of orders received.
If you experience delays in receiving your order, contact us immediately and we will help to confirm the status of your order.
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