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供应商 | Digital Core Design |
---|---|
型号 | D16750 - Configurable UART with FIFO |
类型 | Soft IP |
到期日 | Available on request |
源网址 | View more |
特征 | Allows serial transmission in two modes: UART mode and FIFO mode FIFO mode internal FIFOs are activated allowing up to 512 bytes (plus 3 bits of error data per byte in the RCVR FIFO) to be stored in both receive and transmit directions Performs serial-to-parallel conversion on data characters received from a peripheral device or a MODEM, and parallel-to-serial conversion on data characters received from the CPU CPU can read the complete status of the UART at any time during the functional operation Status information reported includes the type and condition of the transfer operations being performed by the UART, as well as any error conditions (parity, overrun, framing, or break interrupt) Includes a programmable baud rate generator that is capable of dividing the timing reference clock input by divisors of 1 to (216-1), and producing a 16 × clock for driving the internal transmitter logic Has complete MODEM control capability, and a processor-interrupt system Interrupts can be programmed to the user's requirements, minimizing the computing required to handle the communications link |
详情页 | View more |
附件链接 | View more |
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