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| 供应商 | Stellamar |
|---|---|
| 型号 | ADC family uses all digital library cells with no analog block FPGA/ASIC |
| 类型 | Soft IP |
| 到期日 | Available on request |
| 源网址 | View more |
| 特征 | Bypasses cumbersome analog block integration Utilizes digital layout and testing 68% smaller area 50% less power Process technology independent Easily made rad hard Oversampling Extremely low offset drift Reduces risk to first pass success Shorter design times |
| 详情页 | View more |
| 附件链接 | View more |
Digital ADC technology can be implemented in a digital only silicon technology without using any of the analog IP blocks traditionally used for ADC designs. This reduces the design cycle time and cost of integrating ADCs in to ASICs, and can be implemented in fully digital microchips such as FPGAs avoiding the use of external costly ADCs and saving board space.
Configurations are available that support up to 14 bits of resolution at 500 Hz bandwidth, 12 bits up to 15 kHz bandwidth, and 11 bits up to 20 kHz bandwidth. Development is continuing to support higher bandwidths.
The benefits of this new technology compared with similar performance traditional ADCs include:
* No analog block development required
* Shorter / lower risk design cycles
* Process / technology independent
* Digital layout
* Smaller silicon area
* Lower power consumption
* Suitable for applications requiring very low supply voltage
* Digital testing
* Extremely low offset drift
* Suitable for Rad-Hard environments
Additional key features:
* No missing codes
* Oversampling - reduces requirements for anti-aliasing filter
Evaluation boards are available at by contacting the sales department at sales@stellamar.com
Configurations are available that support up to 14 bits of resolution at 500 Hz bandwidth, 12 bits up to 15 kHz bandwidth, and 11 bits up to 20 kHz bandwidth. Development is continuing to support higher bandwidths.
The benefits of this new technology compared with similar performance traditional ADCs include:
* No analog block development required
* Shorter / lower risk design cycles
* Process / technology independent
* Digital layout
* Smaller silicon area
* Lower power consumption
* Suitable for applications requiring very low supply voltage
* Digital testing
* Extremely low offset drift
* Suitable for Rad-Hard environments
Additional key features:
* No missing codes
* Oversampling - reduces requirements for anti-aliasing filter
Evaluation boards are available at by contacting the sales department at sales@stellamar.com
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Q4: How long will it take for my order to arrive after I make payment?
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If you experience delays in receiving your order, contact us immediately and we will help to confirm the status of your order.
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