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| 供应商 | Rambus |
|---|---|
| 型号 | Rambus AES-GCM Single-channel Crypto Accelerator |
| 类型 | Soft IP |
| 到期日 | Silicon proven |
| 源网址 | View more |
| 特征 | The AES-IP-61 AES-CTR core is able to process 1 data block of 256-bit size per clock cycle when there are less than or equal to 5 key/IV switches in 15 clock cycles. Two clock cycles are required to load one key/IV pair: 256-bit data-path using 28 AES cores with 256-bit key size Symmetric AES-CTR block cipher encrypt and decrypt operations 10-channel encoding with 2 pairs of keys and IV per channel Key switching without performance drop (or hit) Key scheduling in hardware Non-encrypted data bypass per block Fake encryption test mode Wide bus interface, 128 bit for data, 256 bit for keys Fully synchronous design |
| 详情页 | View more |
| 附件链接 | View more |
The EIP-61 is the IP for accelerating AES-GCM based cryptographic solutions. Designed for easy integration and very high performance the EIP-61 crypto accelerator provide a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed processing pipelines.
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