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AES-GCM128, GCM-AES Authenticated Encryption-ip-21924
￥10,000.00
| 供应商 | ALMA Technologies |
|---|---|
| 型号 | GCM-AES Authenticated Encryption / Decryption |
| 类型 | Soft IP |
| 到期日 | Available on request |
| 源网址 | View more |
| 特征 | Compliant to Advanced Encryption Standard (AES) (FIPS PUB 197) and NIST SP800-38D for GCM/GMAC Supports both Encryption and Decryption, programmable during operation Processes each 128-bit block in 12/14/16 clock cycles for 128/192/256-bit cipher keys respectively Fully stallable input and output interfaces, ideal for streaming applications Supports 128/192/256-bit Cipher keys Integrated Key Expander for generation of the AES Round Key values 96-bit GCM Initialization Vector GMAC operation supported. Additional Authenticated Data input, without encryption Comparison between the Input Tag and the generated Tag during decryption 12 clocks per Hash operation |
| 详情页 | View more |
| 附件链接 | View more |
The Alma Technologies AES-GCM128 core implements the GCM-AES authenticated encryption / decryption function, as specified in NIST's SP800-38D recommendation for GCM and GMAC, and FIPS-197 Advanced Encryption Standard. The core can be programmed to either encrypt or decrypt 128-bit blocks of data, with a 128-bit, 192-bit or 256-bit cipher key. In addition a Hash value - the Tag - is calculated using the GHASH algorithm for the encrypted or additional plaintext data. In decryption mode, the calculated TAG is compared with the TAG that accompanies the ciphertext data, and a Fail or Pass flag is generated.
The AES-GCM128 core has a 128-bit data path size, meaning 1 clock cycle is required to load/unload each 128-bit plaintext/ciphertext block. A Key Expander is included for the AES in the AES-GCM128 core to automatically generate the Round Key Values for AES. Since the core has a 128-bit datapath and all internal operations are performed on 128-bit words, 12/14/16 clock cyles per HASH are required per 128-bit block. The AES-GCM128 core supports 96-bit Initialization Vectors and input / output Tags of configurable length.
The AES-GCM128 core is equipped with easy to use fully stallable interfaces both for input and output. These are designed to permit the user's application to pause the produced output data stream when it is not able to receive data, or to pause the input stream towards the core according to data arrival rate.
The AES-GCM128 core has a 128-bit data path size, meaning 1 clock cycle is required to load/unload each 128-bit plaintext/ciphertext block. A Key Expander is included for the AES in the AES-GCM128 core to automatically generate the Round Key Values for AES. Since the core has a 128-bit datapath and all internal operations are performed on 128-bit words, 12/14/16 clock cyles per HASH are required per 128-bit block. The AES-GCM128 core supports 96-bit Initialization Vectors and input / output Tags of configurable length.
The AES-GCM128 core is equipped with easy to use fully stallable interfaces both for input and output. These are designed to permit the user's application to pause the produced output data stream when it is not able to receive data, or to pause the input stream towards the core according to data arrival rate.
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